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Ansoft Designer / Ansys Designer 在线帮助文档：

Design Verification >
   Design Verification Commands >
       Design Verification Layer           

Design Verification Layer

A Design Verification layer, or simply “layer”, is a collection of geometry. A layer is a term used internally within DV as input or output for various DV commands. When used as input, the contents of a DV layer can be imported from layout by the ImportLayer command or created by a DV command. When used as output, the SaveLayer command can be used to save the contents of a DV layer as results which can then be viewed in layout.

DV layers contain one of the following types of graphical information:

• Error clusters – Grouped segments that represent the results of a check. Usually a cluster contains two segments, but under certain conditions there may be a fewer or greater number of segments. These segments possess no polygon information. Segments may be a single point.

• Polygons – Closed geometric figures which may contain holes.

DV layers containing polygons may be used as input to any command. Once DV layers containing edges are supported, they may be used as input to commands. DV layers containing polygons or edges support rule “conjunction”, using the output of one check/operation as the input to another check/operation. DV layers containing error clusters may be used as input only with the SaveLayer command.

The topics for this section include:

ImportLayer

ImportNet

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