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Ansoft Designer / Ansys Designer 在线帮助文档：

System Simulator >
System Component Models >
Miscellaneous >
   Sampling Rate Downsampler for Complex Signal (SRDC)       

Sampling Rate Downsampler for Complex Signal (SRDC)

 

 


Property

Description

Units

Default

Range/Type

DF

Factor by which the input signal is downsampled

None

8

[1, Inf)/Integer

OFFSET

Initial samples to remove

None

0

[0, Inf)/Integer

RIN

Input impedance

Ohm

Inf

(0, Inf]/Real

ROUT

Output impedance

Ohm

0

[0, Inf)/Real

Ports

Input

The input signal (complex)

Output

The output signal (complex)

 

Notes

This model downsamples a complex input signal. After removing OFFSET samples from the beginning of the data, the downsampler outputs the first sample in each block of DF input samples. This model can be used for ideal sampling.

Netlist Form

SRDC:Name n1 n2 DF=val [OFFSET=val] [Rin=val][Rout=val]

Netlist Example

SRDC:1 1 2 DF=16



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