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Ansoft Designer / Ansys Designer 在线帮助文档：

System Simulator >
System Component Models >
Stripline >
   SL VIA Through Hole (SLVIAH, SLVIAH_Ref)       

SL VIA Through Hole (SLVIAH, SLVIAH_Ref)

 

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Properties

Description

Units

Default

Range

D

Diameter of VIA hole

m

Required

> 0

DG

Diameter of the lower VIA hole

m

D

> 0

sub

Substrate name

none

Required

string

Notes

1. If metallization is not specified (in the corresponding .SUB statement,) the VIA element behaves as an inductance only.

Netlist Form

SLVIAH:NAME n1 [ n2 ] D=val [DG=val] SUB=label

Netlist Example

SLVIAH:VIAH1 1 D=3.5MIL SUB=SUB1

where SUB1 needs to be defined in the corresponding .SUB statement.

References

1. Unpublished equations developed by Ansoft LLC.



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