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Ansoft Designer / Ansys Designer 在线帮助文档：

System Simulator >
System Component Models >
Math, Complex >
   Divide Two Signals (DIV)       

Divide Two Signals (DIV)

 

 


Property

Description

Units

Default

Range/Type

RIN1

Input1 impedance

Ohm

Inf

(0, Inf]/Real

RIN2

Input2 impedance

Ohm

Inf

(0, Inf]/Real

ROUT

Output impedance

Ohm

0

[0, Inf)/Real

Ports

Input1

Input1 signal, numerator (complex)

Input2

Input2 signal, denominator (complex)

Output

Output signal (complex)

 

Notes

1. This model performs a sample by sample division of two complex (or real) baseband signal.

Netlist Form

1. DIV:NAME n1 n2 n3 [RIN1=val] [RIN2=val] [ROUT=val]

Netlist Example

1. DIV:1 1 2 3



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