淘宝官方店     推荐课程     在线工具     联系方式     关于我们  
　
　

微波射频仿真设计   Ansoft Designer 中文培训教程   |   HFSS视频培训教程套装
　

Agilent ADS 视频培训教程   |   CST微波工作室视频教程   |   AWR Microwave Office
          首页 >> Ansoft Designer >> Ansoft Designer在线帮助文档


Ansoft Designer / Ansys Designer 在线帮助文档：

System Simulator >
System Component Models >
Digital Filters >
   Integrator with Clock (CLKINTG)       

Integrator with Clock (CLKINTG)

 

 


Property

Description

Units

Default

Range/Type

RIN1

Input1 impedance

Ohm

Inf

(0, Inf]/Real

RIN2

Input2 impedance

Ohm

Inf

(0, Inf]/Real

ROUT

Output impedance

Ohm

0

[0, Inf)/Real

Ports

Input

Input signal (real)

Output

Output signal (real)

 

Notes

1. This element performs an integration on the input signal during the time interval determined by the clock signal. Let T0, T1, T2, … be the time instances with the positive edges of the input clock, V2(t), occur (a positive edge occurs at the instant when the clock voltage, V2(t), crosses a threshold of 0.5V). The output signal V3(t) is then determined by the following equations in terms of input signal V1(t).
The integration is performed using the trapezoidal rule. The input signal, clock signal, and out­put signal voltages of the CLKINTG element are shown in the figure.

Netlist Form

CLKINTG:Name n1 n2 n3 [Rin1=val] [Rin2=val][Rout=val]

Netlist Example

CLKINTG:1 1 2 3



HFSS视频教学培训教程 ADS2011视频培训教程 CST微波工作室教程 Ansoft Designer 教程

                HFSS视频教程                                      ADS视频教程                               CST视频教程                           Ansoft Designer 中文教程


　

      Copyright © 2006 - 2013   微波EDA网, All Rights Reserved    业务联系：mweda@163.com