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Glossary: P
Glossary: P
Package
Leaded assembly (inside of which one or more dies
are mounted and connected) for use in larger circuits.
Pad
An area of metallization on a substrate used for probing
or to connect to a via, plated through-hole, or an external interconnect.
Pad Grid Array (PGA)
A packaging technology in which a device's external
connections are arranged as an array of conducting pads on the base
of the package.
Pad Stack
Refers to any pads, anti-pads, and thermal relief
pads associated with a via or a plated through-hole as it passes through
the layers forming the substrate.
Padcap
A special flavor of circuit board used for high-reliability
military applications. Distinguished by the fact that the outer surfaces
of the board have pads but no tracks. Signal layers are only created
on the inner planes, and tracks are connected to the surface pads by
vias.
Parallel-In Serial-Out (PISO)
Refers to a shift register in which the data is loaded
in parallel and read out serially.
Parasitic Effects
The effects caused by undesired resistance, capacitance,
or inductance inherent in the material or topology of a track or component.
Passive Trimming
A process in which a laser beam is used to trim components
such as thick-film and thin-film resistors on an otherwise unpopulated
and unpowered hybrid or multichip module substrate. Probes are placed
at each end of a component to monitor its value while the laser evaporates
some of the material forming the component.
Pass-Transistor Logic
A technique for connecting MOS transistors such that
data signals pass between their source and drain terminals. Pass-transistor
logic minimizes the number of transistors required to implement a function,
and is typically employed by designers of cell libraries or full-custom
integrated circuits.
PGA (Pad Grid Array or Pin Grid Array)
PGA may refer to a pad grid array or a pin grid array.
A pad grid array refers to a packaging technology in which a device's
external connections are arranged as an array of conducting pads on
the base of the package. A pin grid array refers to a packaging technology
in which a device's external connections are arranged as an array of
conducting leads, or pins, on the base of the package.
Photo-Transistor
A special transistor which converts an optical input
in the form of light into an equivalent electronic signal in the form
of a voltage or current.
Pico
Unit qualifier (symbol = p) representing one millionth
of one millionth, or 10-12. For example, 3pS stands for 3
x 10-12 Seconds.
PIN Diode
A diode where a thin layer exists between the N and
P regions. Rectification with pin diodes is limited. They actually behave
more like a variable resistor that changes based upon the DC bias.
Pin Grid Array (PGA)
A packaging technology in which a device's external
connections are arranged as an array of conducting leads, or pins, on
the base of the package.
PISO (Parallel-In Serial-Out)
Refers to a shift register in which the data is loaded
in parallel and read out serially.
Place-Value
Refers to a numbering system in which the value of
a particular digit depends both on the digit itself and its position
in the number.
PlasmA gaseous state in which the atoms or molecules
are dissociated to form ions.
Plated Through-Hole (PTH)
(1)A hole in a double-sided or multilayer board that
is used to accommodate a through-hole component lead and is plated with
copper. (2)An alternative name for the lead through-hole technique for
populating circuit boards in which component leads are inserted into
plated through-holes.
PMOS (P-channel MOS)
Refers to the order in which the semiconductor is
doped in a MOS device. That is, which structures are constructed as
P-type versus N-type material.
PNP (P-type - N-type - P-type)
Refers to the order in which the semiconductor is
doped in a bipolar junction transistor.
Polysilicon Layer
An internal layer in an integrated circuit used to
create the gate electrodes of MOS transistors. In addition to forming
gate electrodes, the polysilicon layer can also be used to interconnect
components. There may be several polysilicon layers separated by dielectric
(insulating) layers.
Populating
The act of attaching components to a substrate.
Positive Logic
A convention which dictates the relationship between
logical values and the physical voltages used to represent them. The
more positive potential is considered to represent TRUE and the more
negative potential is considered to represent FALSE. Also known as positive
true logic.
Positive Resist
A process where radiation passing through the transparent
areas of a mask causes previously cured resist to be degraded. The degraded
areas are then removed using an appropriate solvent.
Positive-Edge
A transition from a logic 0 to a logic 1. Also known
as a rising edge.
Positive-True
A convention which dictates the relationship between
logical values and the physical voltages used to represent them. The
more positive potential is considered to represent TRUE and the more
negative potential is considered to represent FALSE. Also known as positive
logic.
Power Amplifier
A class of amplifier with the primary purpose of delivering
high output power (usually accompanied by significant dissipated power).
Power Plane
A conducting layer in or on the substrate providing
power to the components. There may be several power planes separated
by insulating layers.
Prepreg
Non-conducting semi-cured layers of FR4 used to separate
conducting layers in a multilayer circuit board.
Primitives
Simple logic functions such as BUF, NOT, AND, NAND,
OR, NOR, XOR, and XNOR may be referred to as primitive logic gates or
primitives.
Product Term
A set of literals linked by an AND operator.
Programmable Array Logic (PAL)
A programmable logic device in which the AND array
is programmable but the OR array is pre-defined.
Programmable Logic Array (PLA)
The most user-configurable of the traditional programmable
logic devices, because both the AND and OR arrays are programmable.
Programmable Logic Device (PLD)
The generic name for a device constructed in such
a way that the designer can configure, or "program" it to perform a
specific function.
Programmable Read-Only Memory (PROM)
A programmable logic device in which the OR array
is programmable but the AND array is pre-defined. Usually considered
to be a memory device whose contents can be electrically programmed
(once) by the designer.
Project
A container that groups designs (in the System simulator,
circuits; in the Planar EM and HFSS simulators, models) and their associated
settings, including report definitions, in a file with a .adsn extension.
To the fullest extent possible, Designer projects are portable in that
they include, rather than merely refer to, the library elements (graphical
symbols, materials, footprints, and so on) of the components and models
they contain. Multiple projects can be open in Designer simultaneously.
PROM (Programmable Read-Only Memory)
A programmable logic device in which the OR array
is programmable but the AND array is pre-defined. Usually considered
to be a memory device whose contents can be electrically programmed
(once) by the designer.
Pseudo-Random
An artificial sequence of values that give the appearance
of being random.
PTH (Plated Through-Hole)
(1)A hole in a double-sided or multilayer board that
is used to accommodate a through-hole component lead and is plated with
copper. (2)An alternative name for the lead through-hole technique for
populating circuit boards in which component leads are inserted into
plated through-holes.
P-type
A piece of semiconductor doped with impurities that
make it amenable to accepting electrons.
Pulling
The difference between the maximum frequency of a
VCO when the phase angle of the load impedance reflection coefficient
varies through 360 degrees.
Pulsed Radar
A transmit and receive system used for ranging and
detection that transmits a train of short bursts of high microwave signals
and receives return signals reflected from a target.
Pushing
The change in frequency when the supply voltage changes,
expressed in MHz/V.
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